Templating in make: parameterised targets

May 3, 2011 at 6:27 pm Leave a comment

I just discovered the eval and define keywords in make. These can be used to create parameterised targets. These are useful for a few purposes – one being building for different architectures.

Example use case,

define arch_target
build-$(arch): squid
	# make for architecture...
endef

$(foreach arch,i386 x86_64,$(eval $(arch_target)))
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